FishTail’s SDC Equivalence verification solution is used to confirm if two logically equivalent designs are constrained identically. SDC equivalence can be performed using netlist, RTL or .lib input.
SDC Equivalence Features
What Makes us Different
FishTail’s SDC Equivalence solution is comprehensive in terms of the completeness of the check performed, and the types of situations to which SDC Equivalence can be applied. There is no noise in the reported results and the solution is accompanied with a powerful debug environment that allows engineers to quickly nail down the reason for a discrepancy. FishTail’s SDC Equivalence solution scales to handle the largest SoCs with fast runtime.