FishTail’s Mode Merging solution is used to merge SDCs for multiple design modes into a single super mode SDC file. The objective is to reduce P&R runtimes and STA resources without any impact on the Quality of Results.

Mode Merging Features

No restrictions

Our mode-merging solution places no restrictions on the number of modes that may be merged and no restriction on the way the SDC for each mode is written. We do not require modes to dominate each other but allow for portions of a design to have tighter timing requirements in different modes. Engineers can merge all modes into a single super-mode or create multiple super-mode SDC files for different mode groups.

Support for scenario merging

We support different SDCs for different corners and allow SDCs for the same corner to be merged into a single super-mode SDC.

Support for P&R, STA, Synthesis

Engineers control whether the super-mode SDC is amenable for consumption by a P&R tool or by STA. For P&R we ensure that constraint complexity is low, while some pessimism is allowed. For STA we ensure that the super-mode SDC exactly matches multi-mode timing. We support merging with RTL input, allowing merged constraints to drive logic synthesis.

Verification of Super-Mode SDC

The quality of the merged super-mode SDC file is verified by either using third-party STA tools or by using our SDC Equivalence verification solution. We have developed scripts that run in popular STA tools that compare the slack of a timing endpoint with the super-mode SDC to the tightest slack for the timing endpoint with multi-mode constraints. The slack should match, regardless of whether it is positive or negative, and if it does not reports are generated and a debug environment is provided to rootcause the issue.

What Makes us Different

Our mode-merging solution is highly sophisticated and is able to merge modes even if there are significant differences in the way these modes are clocked, timed or constrained. There is no restriction on the number of modes being merged. We support scenario merging, RTL merging for logic synthesis, and are able to generate different merged SDCs depending on whether the intent is to use the constraints in P&R or STA. We provide a robust solution for verifying the quality of the super-mode SDC generated by the tool.

SDC Management Solutions

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SDC Merge Advantage

White paper

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Mode Merging

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DAC User Track Presentation 2009

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Mode Merging Case Study

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Mode Merging

Presentation

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